1. Technical Field
The present invention relates to a memory device, a method of manufacturing a memory device, and a method for data writing.
2. Related Art
Memory devices using metal oxide semiconductor (MOS) have been known (for example, see Patent Document 1). One of typical examples of such memory device is a flash EPROM in which a plurality of memory cells are formed, each memory cell can store data which is written therein by a write operation, and can erase the stored data by an erase operation. The memory cell has, for example, a source region, a drain region, a control gate and an electrically-isolated floating gate. The memory cell stores data written by a user by accumulating electric charges in the floating gate. The above-stated Patent Document 1 is Japanese Patent Application Publication H06-215587.
The above mentioned memory device needs to cause an avalanche breakdown phenomenon by applying a relatively high voltage to the control gate and the drain region in order to accumulate electric charges in the floating gate and to generate a large number of hot electrons. When write/erase operations are repeated, oxide films that isolate the control gate from the source and drain regions can be easily deteriorated.
Moreover, in the above-mentioned memory device, a voltage needs to be applied to the control gate, and therefore a wiring line that couples the control gate and a voltage supplying section has to be provided in each memory cell. Furthermore, it is an advantage that the memory device can perform write/erase operations, but this could also work as a disadvantage such that it is difficult to prevent tampering with stored data.